1. Technical Field
Various embodiments relate generally to a semiconductor memory device and a method of operating the same and, more particularly, to a semiconductor memory device including memory cells and a method of operating the same.
2. Related Art
A semiconductor memory device includes a memory array. The memory array includes a plurality of memory cells. Connection relationships and arrangements of memory cells vary depending on types of memory devices. For example, in a NAND flash memory device, memory cells are coupled in series between bit lines and a source line.
An operating voltage is to be supplied to memory cells in order to store data in the memory cells, output data stored in the memory cells or erase the data stored in the memory cells. In a NAND flash memory device, a considerably high voltage is supplied to memory cells in order to perform the above-described operations. A high erase voltage may be supplied to a bulk (well or P well) of the memory cells, especially during an erase operation.
One of the key reliability indicators for a flash memory device is endurance that determines how many times a program operation performed to store data and an erase operation performed to erase the data are repeated. Endurance is directly associated with performance of the flash memory device. Since a high voltage is supplied to memory cells during a program operation or an erase operation, stress may be applied to the memory cells. When a high voltage is supplied to a bulk of a memory cell during an erase operation, an erase voltage may sharply increase from 0V to a target level. As a result, an excessive electric field may be applied to an insulating layer (for example, a tunnel insulating layer or a dielectric layer) included in the memory cell. As a result, characteristics of the insulating layer may be deteriorated. In addition, with increasing cumulative numbers of program operations and erase operations, if a higher erase voltage is supplied to compensate for deterioration of erase characteristics, the characteristics of the insulating layers may be further deteriorated.
Since the accumulated stress may cause failures, stress is to be reduced to improve the reliability of a memory device.